Predictika · Embedded processors
An AI sales agent prepares an order for NXP i.MX 8M Plus applications processors: which variant (Quad, Quad with ISP and VPU, QuadLite or Dual), which temperature grade and speed code, the quantity, what the customer's design needs (neural processing unit, camera image signal processor, video, audio DSP, cores, clock speed, junction temperature range), and the total core count it states. Before it goes out, the agent sends it to Predictika, which checks it against a declarative model of the ordering information NXP publishes in the i.MX 8M Plus data sheets and returns a verdict, every reason and the figures it computed.
This validator models the selection of one i.MX 8M Plus orderable part (part numbers of the form MIMX8ML@+VN$$%A) from the ordering information and module tables of NXP's public data sheets for consumer and industrial products, not just the scenarios shown below.
Any i.MX 8M Plus order that touches these rules is in scope — not only the scenarios pictured here. Not covered: prices (NXP publishes no processor prices on its product pages, so this page shows no price build-up), other i.MX families, other packages, memory and board-level design, and any part the data sheet tables do not list. The data sheet previews read are Rev. 1 (August 2021); NXP has since issued later revisions.
6 scenarios in 3 groups · each group runs from the agent’s first attempt to the outcome · click one to switch
Illustrative agent statement. The validator receives the structured request below.
Proposing agent: AI sales agent (scripted)
Before sending, the agent must call Recorded run
What this means
Our assessment of what a typical rules-based CPQ (product rules, price rules and validation rules, as in Salesforce CPQ) does with the same cases. It is a judgment about effort and reliability, not a claim that nothing can be built.
| What the validator caught | Typical rules-based CPQ | Predictika |
|---|---|---|
| Only the variants that have the accelerator the design needs | Only with care Which variant has the NPU, ISP, VPU and HiFi 4 is a table that a rules-based CPQ holds as one product rule per accelerator and variant, kept in step with the data sheet by hand. | The variant and the design needs arrive in one request and are compared with the data sheet table on every call. |
| Temperature grade against the junction temperature the design needs | Only with care The grade fixes the temperature range, and the range has to be compared with a requirement that is not itself a product choice. | The grade, its range and the design's range are compared on every call, including a single degree outside. |
| Speed code and grade pairs that the data sheet does not list | Only with workarounds A rule has to say what is not listed, which means one rule per unlisted pair and a review whenever the data sheet adds a part. | Unlisted pairs go to a person with the reason, without blocking a combination that may still be orderable. |
| Core total the quote states | Only with care The stated total is derived from the quantity and the variant, so a rule has to recompute it and compare. | The stated total is a field in the request, compared with the computed one on every call. |
| Every problem returned in one answer | Only with workarounds Rules tend to fire as the quote is saved or a step is completed, so a person often fixes one error and meets the next. | All findings come back together, whatever order the choices arrived in. |
Every rule is checked on every call, in any order the choices arrive; one problem never hides another. Blocking findings stop the quote; approval findings need a person to sign off; everything else is computed.
| 1 | The design needs the neural processing unit (NPU); this i.MX 8M Plus variant does not have one. |
| 2 | The design needs the HiFi 4 audio DSP; this i.MX 8M Plus variant does not have one. |
| 3 | The design needs the image signal processor (ISP) for its cameras; this i.MX 8M Plus variant does not have one. |
| 4 | The design needs hardware video encode and decode (VPU); this i.MX 8M Plus variant does not have one. |
| 5 | The design needs 4 Cortex-A53 cores; this variant has 2. |
| 6 | The quote states 4000 Cortex-A53 cores in total; the quoted parts give 8000. |
| 7 | The quote states 8000 Cortex-A53 cores in total; the quoted parts give 4000. |
| 8 | The design needs a junction temperature range of -40 to 105 degrees Celsius; this temperature grade covers 0 to 95 degrees Celsius. |
| 9 | The design needs a junction temperature range of -1 to 95 degrees Celsius; this temperature grade covers 0 to 95 degrees Celsius. |
| 10 | The design needs a junction temperature range of 0 to 96 degrees Celsius; this temperature grade covers 0 to 95 degrees Celsius. |
| 11 | The design needs a junction temperature range of -40 to 106 degrees Celsius; this temperature grade covers -40 to 105 degrees Celsius. |
| 12 | The design needs Cortex-A53 cores running at 1800 MHz; the selected speed code gives 1600 MHz. |
| 13 | The data sheets list only 1.6 GHz parts for the industrial grade and 1.8 GHz parts for the consumer grade; this combination is not listed, so an NXP representative should confirm it can be ordered. |
| 14 | The part has the special (S) qualification level, which the data sheet does not describe further; an NXP representative should confirm what it means for this order. |
| 15 | The part number uses a package, fusing or silicon revision code that the data sheet does not list (it lists FCBGA548 code VN, fusing A and silicon revision A1 coded B); an NXP representative should confirm it. |
| 16 | The order has 0 units; it needs at least 1. |
The recorded result of the validator for each scenario on this page: the request the AI agent sent, the verdict, and every finding, in the order they appear above.
The agent's request. Please quote 3,000 i.MX 8M Plus processors, the MIMX8ML6 Quad in the consumer grade with the LZ speed code (1.8 GHz). The design needs the image signal processor and hardware video encode and decode, 4 Cortex-A53 cores running at 1,500 MHz and a junction temperature range of -25 to 90 degrees Celsius. The quote states 12,000 Cortex-A53 cores in total. It is ready to send.
Verdict: Blocked.
The agent's request. Please quote 3,000 i.MX 8M Plus processors, the MIMX8ML6 Quad in the industrial grade with the KZ speed code (1.6 GHz). The design needs the image signal processor and hardware video encode and decode, 4 Cortex-A53 cores running at 1,500 MHz and a junction temperature range of -25 to 90 degrees Celsius. The quote states 12,000 Cortex-A53 cores in total. It is ready to send.
Verdict: Allowed.
The agent's request. Please quote 5,000 i.MX 8M Plus processors, the MIMX8ML4 QuadLite in the industrial grade with the KZ speed code (1.6 GHz). The design needs the neural processing unit, the image signal processor and hardware video encode and decode, 4 Cortex-A53 cores running at 1,500 MHz and a junction temperature range of -40 to 105 degrees Celsius. The quote states 20,000 Cortex-A53 cores in total. It is ready to send.
Verdict: Blocked.
The agent's request. Please quote 5,000 i.MX 8M Plus processors, the MIMX8ML8 Quad in the industrial grade with the KZ speed code (1.6 GHz). The design needs the neural processing unit, the image signal processor and hardware video encode and decode, 4 Cortex-A53 cores running at 1,500 MHz and a junction temperature range of -40 to 105 degrees Celsius. The quote states 20,000 Cortex-A53 cores in total. It is ready to send.
Verdict: Allowed.
The agent's request. Please quote 2,500 i.MX 8M Plus processors, the MIMX8ML8 Quad in the industrial grade with the KZ speed code (1.6 GHz). The design needs the neural processing unit, the image signal processor and hardware video encode and decode, 4 Cortex-A53 cores running at 1,800 MHz and a junction temperature range of -40 to 105 degrees Celsius. The quote states 10,000 Cortex-A53 cores in total. It is ready to send.
Verdict: Blocked.
The agent's request. Please quote 2,500 i.MX 8M Plus processors, the MIMX8ML8 Quad in the industrial grade with the LZ speed code (1.8 GHz). The design needs the neural processing unit, the image signal processor and hardware video encode and decode, 4 Cortex-A53 cores running at 1,800 MHz and a junction temperature range of -40 to 105 degrees Celsius. The quote states 10,000 Cortex-A53 cores in total. It is ready to send.
Verdict: Needs approval.
The text of the narrated walkthrough, step by step.